As disclosed, for example, in JP-3069468, it is well known that photolithography, which uses a chemical reaction, is employed to selectively remove an insulation layer of a semiconductor device such as a metal-oxide semiconductor (MOS) device so as to form a hole in the insulation layer.
In particular, in a semiconductor device such as a power transistor, a resin insulation layer is used to electrically insulate electrodes and trace patterns on a surface of a substrate. The resin insulation layer is patterned through processes of exposure, development, and etching in photolithography. However, this method can involve the following problems:
1. As an insulation layer is thicker, the time required to etch the insulation layer becomes longer.
2. There is a trade-off between a thickness of the insulation layer and a pattern size of the insulation layer. In the case of a thick insulation layer, it is difficult to form a fine pattern of the insulation layer.
3. It is difficult to form a tapered hole having a desired taper angle in the insulation layer.
4. A surface of the insulation layer is raised around an opening of the tapered hole.
Therefore, there has been a demand for a method of forming a tapered hole having a desired taper angle in a resin insulation layer regardless of the thickness of the resin insulation layer.
Some methods other than photolithography have been proposed to pattern a resin insulation layer on a semiconductor substrate.
In a method disclosed in JP 2005-12098A, WO 2004/061935, JP 2006-186304A, and U.S. Pat. No. 6,428,393 corresponding to JP 2000-173954A, a resin insulation layer on a semiconductor substrate is machined to planarize the resin insulation layer on the semiconductor substrate. However, since the resin insulation layer is patterned by using photolithography, it is difficult to form the resin insulation layer in a desired pattern.
In a method disclosed in US 2008/0113466 corresponding to JP 2008-124150A, a hole is formed in a resin insulation layer by using a cutting tool. However, since the hole is formed by scraping the resin insulation layer to one side, it is difficult to form the hole having a desired shape in the resin insulation layer. In particular, a surface of the resin insulation layer is raised around an opening of the hole.
A method disclosed in a non-patent document “A New Flip Bonding Method Using Ultra-precision Cutting of Metal/Adhesive Layers, International Conference on Electronics Packaging, Outstanding papers of the 2007 Conference” is used for planarization but is not used for patterning of a resin insulation layer.